AO4627 30v complementary mosfet general description product summary n-channel p-channel v ds = 30v -30v i d = 4.5a (v gs =10v) -3.5a (v gs =-10v) r ds(on) r ds(on) < 50m (v gs =10v) < 100m (v gs =-10v) < 68m (v gs =4.5v) < 165m (v gs =-4.5v) 100% uis tested 100% uis tested 100% r g tested 100% r g tested the AO4627 uses advanced trench technology to provi de excellent r ds(on) and low gate charge. this complementary n and p channel mosfet configuration is ideal for low input voltage inverter application s. soic-8 top view bottom view g1 s1 g2 s2 d1 d1 d2 d2 2 4 5 1 3 86 7 top view g1 d1 g2 d2 symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jl 1.3 -30 drain-source voltage 30 v avalanche energy l=0.1mh c absolute maximum ratings t a =25c unless otherwise noted max n-channel max p-channel gate-source voltage 20 3 avalanche current c a mj units parameter 20 -3.5 4.5 continuous drain current 3.5 t a =25c t a =70c va pulsed drain current c 25 i d 83 -2.5 -20 -8 maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 32 40 74 90 r q ja 48 62.5 maximum junction-to-ambient a c/w thermal characteristics t a =70c junction and storage temperature range -55 to 150 parameter typ max c units 1.3 p d t a =25c w power dissipation b 2 2 pin1 s1 s2 n - channel p - channel rev 0: july 2011 www.aosmd.com page 1 of 9
AO4627 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.5 2 2.5 v i d(on) 25 a 39 50 t j =125c 63 78 50 68 m w g fs 10 s v sd 0.79 1 v i s 2.5 a c iss 135 170 210 pf c oss 25 35 45 pf c rss 13 23 33 pf r g 1.7 3.5 5.3 w q g (10v) 4.05 5 nc q g (4.5v) 2 3 nc q gs 0.55 nc q gd 1 nc t d(on) 4.5 ns t 1.5 ns drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =4.5a reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz switching parameters v ds =v gs i d =250 m a v ds =0v, v gs =20v gate-body leakage current forward transconductance gate drain charge total gate charge n-channel electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a zero gate voltage drain current r ds(on) static drain-source on-resistance m w i s =1a,v gs =0v v ds =5v, i d =4.5a v gs =4.5v, i d =3a diode forward voltage maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time v =10v, v =15v, r =3.3 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =15v, i d =4.5a gate source charge t r 1.5 ns t d(off) 18.5 ns t f 15.5 ns t rr 7.5 10 ns q rr 2.5 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time i f =4.5a, di/dt=100a/ m s body diode reverse recovery charge i f =4.5a, di/dt=100a/ m s turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =3.3 w , r gen =3 w turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedance which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150 c. the soa curve provides a single pulse rating. rev 0: july 2011 www.aosmd.com page 2 of 9
AO4627 n-channel: typical electrical and thermal character istics 17 52 10 0 18 0 2 4 6 8 10 1 2 3 4 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 30 40 50 60 0 2 4 6 8 10 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =3a v gs =10v i d =4.5a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 3 6 9 12 15 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 3.5v 10v 4v 4.5v 7v 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 30 50 70 90 110 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =4.5a 25 c 125 c rev 0: july 2011 www.aosmd.com page 3 of 9
AO4627 n-channel: typical electrical and thermal character istics 0 2 4 6 8 10 0 1 2 3 4 5 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 50 100 150 200 250 300 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =4.5a 1 10 100 1000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 10: single pulse power rating junction - to - ambient (note f) t a =25 c 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased 10 m s 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms junction - to - ambient (note f) figure 9: maximum forward biased safe operating area (note f) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =90 c/w t on t p d rev 0: july 2011 www.aosmd.com page 4 of 9
AO4627 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & w aveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & w aveforms t t r d(on) t on t d(off) t f t off l vds bv unclamped inductive switching (uis) test circuit & w aveforms vds dss 2 e = 1/2 li ar ar vdd vgs id vgs rg dut - + vdc vgs vds id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev 0: july 2011 www.aosmd.com page 5 of 9
AO4627 symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -1 t j =55c -5 i gss 100 na v gs(th) gate threshold voltage -1.4 -1.9 -2.4 v i d(on) -20 a 78 100 t j =125c 111 140 120 165 m w g fs 6 s v sd -0.8 -1 v i s -2.5 a c iss 155 197 240 pf c oss 28 42 55 pf c rss 15 26 37 pf r g 3.5 7.2 11 w q g (10v) 4.3 5.2 nc q g (4.5v) 2.2 3 nc q gs 0.7 nc q gd 1.1 nc t d(on) 7.5 ns t 4.1 ns maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters v =10v, v =-15v, r =4 w , reverse transfer capacitance v gs =0v, v ds =-15v, f=1mhz switching parameters gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =-15v, i d =-3.5a gate source charge gate drain charge total gate charge turn-on rise time zero gate voltage drain current gate-body leakage current m w i s =-1a,v gs =0v v ds =-5v, i d =-3.5a v gs =-4.5v, i d =-2a forward transconductance diode forward voltage p-channel electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-3.5a r ds(on) static drain-source on-resistance i dss m a v ds =v gs, i d =-250 m a v ds =0v, v gs =20v t r 4.1 ns t d(off) 11.8 ns t f 3.8 ns t rr 11.3 14 ns q rr 4.4 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. v gs =10v, v ds =-15v, r l =4 w , r gen =3 w body diode reverse recovery charge i f =-3.5a, di/dt=100a/ m s turn-on rise time turn-off delaytime i f =-3.5a, di/dt=100a/ m s turn-off fall time body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedance which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150 c. the soa curve provides a single pulse rating. rev 0: july 2011 www.aosmd.com page 6 of 9
AO4627 p-channel: typical electrical and thermal character istics 17 52 10 0 18 0 2 4 6 8 10 1 2 3 4 5 6 -i d (a) -v gs (volts) figure 2: transfer characteristics (note e) 40 60 80 100 120 140 160 180 200 0 2 4 6 8 10 r ds(on) (m w ww w ) -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =-4.5v i d =-2a v gs =-10v i d =-3.5a 25 c 125 c v ds =-5v v gs =-4.5v v gs =-10v 0 3 6 9 12 15 0 1 2 3 4 5 -i d (a) -v ds (volts) fig 1: on-region characteristics (note e) v gs =-3.5v -4v -10v -4.5v - 5v - 8v - 6v 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -i s (a) -v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 60 100 140 180 220 260 300 2 4 6 8 10 r ds(on) (m w ww w ) -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =-3.5a 25 c 125 c rev 0: july 2011 www.aosmd.com page 7 of 9
AO4627 p-channel: typical electrical and thermal character istics 0 2 4 6 8 10 0 1 2 3 4 5 -v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 50 100 150 200 250 300 0 5 10 15 20 25 30 capacitance (pf) -v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =-15v i d =-3.5a 1 10 100 1000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 10: single pulse power rating junction- to - ambient (note f) t a =25 c 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 -i d (amps) -v ds (volts) figure 9: maximum forward biased 10 m s 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms to - ambient (note f) figure 9: maximum forward biased safe operating area (note f) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =90 c/w t on t p d rev 0: july 2011 www.aosmd.com page 8 of 9
AO4627 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & w aveform - + - + -10v id vds unclamped inductive switching (uis) test circuit & waveforms vds l 2 e = 1/2 li ar ar vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) vdd vgs id vgs rg dut vdc vgs id vgs - + bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i rev 0: july 2011 www.aosmd.com page 9 of 9
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